| IntEnable | Interrupt enable bit. |
| DataWidthDst | Destination data width. Dma data width select |
| DataWidthSrc | Source data width. Dma data width select |
| AddrChangeDst | Destination address change. Dma memory address state |
| AddrChangeSrc | Source address change. Dma memory address state |
| BurstLenDst | Destination burst transaction length. Dma burst lenth |
| BurstLenSrc | Source burst transaction length. Dma burst lenth |
| GatherEnSrc | Source gather enable bit. |
| ScatterEnDst | Destination scatter enable bit. |
| __Rev0 | reversed bit. |
| TransferType | Transfer Type. Dma transfer type |
| FlowControl | Flow Control DMAC_FlowControl_Peripheral, DMAC_FlowControl_DMA |
| __Rev1 | reversed bit. |
| BlockSize | Block size number ,block_size = data_len / DataWidth. |
| Done | Done flag. |
| __Rev2 | reversed bit. |
| __Rev3 | reversed bit. |
| ChannelPriority | Channel priority,it can be 0~7,the priority 7 is the highest. |
| ChannelSuspend | Channel Suspend,transfer is not complete ,set this bit can stop transmit. |
| FifoEmpty | Indicates if there is data left in the channel FIFO |
| HandshakeDst | Destination Handshake select:software or hardware |
| HandshakeSrc | Source Handshake select:software or hardware |
| LockBus | When active, the AHB bus master signal hlock is asserted for the duration specified in CFGx.LOCK_B_L. |
| LockChannel | When the channel is granted control of the master bus interface and if the CFGx.LOCK_CH bit is asserted,then no other channels are granted control of the master bus interface for the duration specified in CFGx.LOCK_CH_L |
| LockBusLevel | Indicates the duration over which CFGx.LOCK_B bit applies. |
| LockChannelLevel | Indicates the duration over which CFGx.LOCK_CH bit applies. |
| HandshakePolarityDst | Destination Handshaking Interface Polarity:0-high, 1-low. |
| HandshakePolaritySrc | Source Handshaking Interface Polarity:0-high, 1-low. |
| __Rev4 | reversed bit. |
| AutoReloadSrc | Automatic Source Reload. |
| AutoReloadDst | Automatic Destination Reload. |
| FlowControlMode | Determines when source transaction requests are serviced when the Destination Peripheral is the flow controller. |
| FifoMode | Determines how much space or data needs to be available in the FIFO. |
| ProtectControl | Used to drive the AHB HPROT[3:1] bus. |
| __Rev5 | reversed bit. |
| PeripheralSrc | Assigns a hardware handshaking interface to the source of channel x if the CFGx.HS_SEL_SRC field is 0 |
| PeripheralDst | Assigns a hardware handshaking interface to the destination of channel x if the CFGx.HS_SEL_DST field is 0 |
| __Rev6 | reversed bit. |
