Panchip series clk driver header file. More...

Macros
#define	CLK_DPLL_OUTPUT_DIV (CLK_DPLL_OUT_96M)

#define	CLK_APB1_WDTSEL_MILLI_PULSE (0x00000000UL)

#define	CLK_APB1_WDTSEL_RCL32K (0x00010000UL)

#define	CLK_APB1_WWDTSEL_MILLI_PULSE (0x00000000UL)

#define	CLK_APB1_WWDTSEL_RCL32K (0x00020000UL)

#define	CLK_APB1_TMR0SEL_APB1CLK (0x00000000UL)

#define	CLK_APB1_TMR0SEL_RCL32K (0x00040000UL)

#define	CLK_APB1_TMR0SEL_TM0 (0x00080000UL)

#define	CLK_APB2_TMR1SEL_APB2CLK (0x00000000UL)

#define	CLK_APB2_TMR1SEL_RCL32K (0x00000100UL)

#define	CLK_APB2_TMR1SEL_TM1 (0x00000200UL)

#define	CLK_APB2_TMR2SEL_APB2CLK (0x00000000UL)

#define	CLK_APB2_TMR2SEL_RCL32K (0x00000400UL)

#define	CLK_APB2_TMR2SEL_TM2 (0x00000800UL)

#define	FREQ_1MHZ (1000000)

#define	FREQ_8MHZ (8000000)

#define	FREQ_16MHZ (16000000)

#define	FREQ_25MHZ (25000000)

#define	FREQ_32MHZ (32000000)

#define	FREQ_48MHZ (48000000)

#define	FREQ_64MHZ (64000000)

#define	FREQ_96MHZ (96000000)

#define	FREQ_50MHZ (50000000)

#define	FREQ_72MHZ (72000000)

#define	FREQ_100MHZ (100000000)

#define	FREQ_200MHZ (200000000)

#define	FREQ_250MHZ (250000000)

#define	FREQ_500MHZ (500000000)

#define	CLK_SYS_SRCSEL_RCH ((uint32_t)0x00000000)

#define	CLK_SYS_SRCSEL_XTH ((uint32_t)0x00000100)

#define	CLK_SYS_SRCSEL_DPLL ((uint32_t)0x00000200)

#define	CLK_DPLL_REF_CLKSEL_RCH ((uint32_t)0x00000000)

#define	CLK_DPLL_REF_CLKSEL_XTH ((uint32_t)0x00000002)

#define	CLK_DPLL_OUT_48M ((uint32_t)0x00000000)

#define	CLK_DPLL_OUT_64M ((uint32_t)0x00000001)

#define	CLK_HCLK_APB2_Div1 ((uint32_t)0x00000000)

#define	CLK_HCLK_APB2_Div2 ((uint32_t)0x00100000)

#define	CLK_HCLK_APB2_Div4 ((uint32_t)0x00200000)

#define	CLK_HCLK_APB2_Div8 ((uint32_t)0x00400000)

#define	CLK_HCLK_APB2_Div16 ((uint32_t)0x00800000)

#define	CLK_HCLK_APB1_Div1 ((uint32_t)0x00000000)

#define	CLK_HCLK_APB1_Div2 ((uint32_t)0x00010000)

#define	CLK_HCLK_APB1_Div4 ((uint32_t)0x00020000)

#define	CLK_HCLK_APB1_Div8 ((uint32_t)0x00040000)

#define	CLK_HCLK_APB1_Div16 ((uint32_t)0x00080000)

#define	CLK_APB1Periph_I2C0 ((uint32_t)0x00000001)

#define	CLK_APB1Periph_SPI0 ((uint32_t)0x00000002)

#define	CLK_APB1Periph_UART0 ((uint32_t)0x00000008)

#define	CLK_APB1Periph_PWM0_CH01 ((uint32_t)0x00000010)

#define	CLK_APB1Periph_PWM0_CH23 ((uint32_t)0x00000020)

#define	CLK_APB1Periph_PWM0_CH45 ((uint32_t)0x00000040)

#define	CLK_APB1Periph_PWM0_CH67 ((uint32_t)0x00000080)

#define	CLK_APB1Periph_PWM0_EN ((uint32_t)0x00000100)

#define	CLK_APB1Periph_ADC ((uint32_t)0x00000200)

#define	CLK_APB1Periph_WDT ((uint32_t)0x00000400)

#define	CLK_APB1Periph_WWDT ((uint32_t)0x00000800)

#define	CLK_APB1Periph_TMR0 ((uint32_t)0x00001000)

#define	CLK_APB1Periph_I2SS ((uint32_t)0x00100000)

#define	CLK_APB1Periph_I2SM ((uint32_t)0x00200000)

#define	CLK_APB1Periph_PWM1_CH01 ((uint32_t)0x00400000)

#define	CLK_APB1Periph_PWM1_CH23 ((uint32_t)0x00800000)

#define	CLK_APB1Periph_PWM1_CH45 ((uint32_t)0x01000000)

#define	CLK_APB1Periph_PWM1_CH67 ((uint32_t)0x02000000)

#define	CLK_APB1Periph_PWM1_EN ((uint32_t)0x04000000)

#define	CLK_APB1Periph_PWM2_CH01 ((uint32_t)0x08000000)

#define	CLK_APB1Periph_PWM2_CH23 ((uint32_t)0x10000000)

#define	CLK_APB1Periph_PWM2_CH45 ((uint32_t)0x20000000)

#define	CLK_APB1Periph_PWM2_CH67 ((uint32_t)0x40000000)

#define	CLK_APB1Periph_PWM2_EN ((uint32_t)0x80000000)

#define	CLK_APB1Periph_All ((uint32_t)0xfff01ffb)

#define	CLK_APB2Periph_SPI1 ((uint32_t)0x00000002)

#define	CLK_APB2Periph_UART1 ((uint32_t)0x00000008)

#define	CLK_APB2Periph_TMR1 ((uint32_t)0x00000010)

#define	CLK_APB2Periph_TMR2 ((uint32_t)0x00000020)

#define	CLK_APB2Periph_KEYSCAN ((uint32_t)0x00001000)

#define	CLK_APB2Periph_QDEC ((uint32_t)0x00400000)

#define	CLK_APB2Periph_All ((uint32_t)0x0040103a)

#define	CLK_AHBPeriph_DMAC ((uint32_t)0x00000001)

#define	CLK_AHBPeriph_GPIO ((uint32_t)0x00000002)

#define	CLK_AHBPeriph_SYSTICK ((uint32_t)0x00000004)

#define	CLK_AHBPeriph_APB1 ((uint32_t)0x00000008)

#define	CLK_AHBPeriph_APB2 ((uint32_t)0x00000010)

#define	CLK_AHBPeriph_AHB ((uint32_t)0x00000020)

#define	CLK_AHBPeriph_BLE_32M ((uint32_t)0x00000040)

#define	CLK_AHBPeriph_BLE_32K ((uint32_t)0x00000080)

#define	CLK_AHBPeriph_ROM ((uint32_t)0x00000400)

#define	CLK_AHBPeriph_EFUSE ((uint32_t)0x00000800)

#define	CLK_AHBPeriph_ECC ((uint32_t)0x00001000)

#define	CLK_AHBPeriph_USB_AHB ((uint32_t)0x00002000)

#define	CLK_AHBPeriph_USB_48M ((uint32_t)0x00004000)

#define	CLK_AHBPeriph_All ((uint32_t)0x00007CFF)

#define	CLK_RCL_SELECT (0)

#define	CLK_RCH_SELECT (1)

#define	CLK_XTL_SELECT (2)

#define	CLK_XTH_SELECT (3)

#define	CLK_DPLL_SELECT (4)

#define	CLK_STABLE_STATUS_Pos (24)

#define	CLK_STABLE_STATUS_Msk (0x1ul << CLK_STABLE_STATUS_Pos)

#define	CLKTRIM_CALC_CLK_SEL_32K (0)

#define	CLKTRIM_CALC_CLK_SEL_32M (1)

#define	CLKTRIM_CALC_CLK_SEL_EXT (3)

#define	CLKTRIM_QDEC_CLK_SEL_APB (0)

#define	CLKTRIM_QDEC_CLK_SEL_32K (1)

#define	CLKTRIM_KSCAN_CLK_SEL_APB (0)

#define	CLKTRIM_KSCAN_CLK_SEL_32K (1)

#define	DISABLE_3V_AUTOSYNC ANA->LP_REG_SYNC &= ~ANAC_LP_REG_AUTOSYNC_Msk
	This macro is used to disable Auto-sync function. More...

#define	ENABLE_3V_AUTOSYNC ANA->LP_REG_SYNC \|= ~ANAC_LP_REG_AUTOSYNC_Msk
	This macro is used to enable Auto-sync function. More...

#define	START_3V_SYNC_NBLOCK ANA->LP_REG_SYNC \|= ANAC_LP_REG_SYNC_3V_Msk
	This macro is used to start sync. More...

Enumerations
enum	{ CLK_FLASH_CLKDIV_1 = 0x00 , CLK_FLASH_CLKDIV_2 = 0x01 , CLK_FLASH_CLKDIV_4 = 0x02 , CLK_FLASH_CLKDIV_8 = 0x04 , CLK_FLASH_CLKDIV_16 = 0x08 , CLK_FLASH_CLKDIV_32 = 0x10 }

Functions
__STATIC_INLINE void	CLK_XthStartupConfig (void)
	Configures the xth clock. More...

__STATIC_INLINE void	CLK_HCLK1Config (uint32_t u32ClkDiv)
	Configures the Low Speed AHB clock (HCLK). More...

__STATIC_INLINE void	CLK_PCLK1Config (uint32_t u32ClkDiv)
	Configures the Low Speed APB clock (PCLK1). More...

__STATIC_INLINE void	CLK_PCLK2Config (uint32_t u32ClkDiv)
	Configures the High Speed APB clock (PCLK2). More...

__STATIC_INLINE void	CLK_SetQdecDiv (uint32_t div)
	This function used to set qdec divisor. More...

__STATIC_INLINE uint32_t	CLK_GetQdecDiv (void)
	This function used to get qdec divisor. More...

__STATIC_INLINE void	CLK_SetQdecClkSrc (uint32_t src)
	This function used to set qdec clk source. More...

__STATIC_INLINE void	CLK_SetKeyscanDiv (uint32_t div)
	This function used to set keyscan divisor. More...

__STATIC_INLINE uint32_t	CLK_GetKeyscanDiv (void)
	This function used to get keyscan divisor. More...

__STATIC_INLINE void	CLK_SetKeyscanClkSrc (uint32_t src)
	This function used to set keyscan clk source. More...

__STATIC_INLINE void	CLK_SetDpllOutputFreq (uint32_t freq)
	This function set DPLL frequence. More...

__STATIC_INLINE void	CLK_SetTemperatureGain (uint32_t gain)
	This function set temperature gain value. More...

__STATIC_INLINE void	CLK_EnableTempDetect (void)
	This function set temperature function enable. More...

__STATIC_INLINE void	CLK_EnableClkTrim (FunctionalState NewState)
	This function used to enable clktrim peripheral. More...

__STATIC_INLINE void	CLK_EnableClkTrimCalc (FunctionalState NewState)
	This function used to enable clktrim calculate function. More...

__STATIC_INLINE void	CLK_SelectClkTrimSrc (uint32_t src)
	This function used to select calculate clk source. More...

__STATIC_INLINE void	CLK_SetClkTrimCalClkDiv (uint16_t div)
	This function is used to set calculated high speed clock source (HSCK = RCH/EXT_CLK) divisor of CLKTRIM. More...

__STATIC_FORCEINLINE void	CLK_SetFlashClkDiv (uint8_t div)
	This function is used to set flash clk divisor. More...

uint32_t	CLK_GetHCLKFreq (void)
	This function get HCLK frequency. The frequency unit is Hz. More...

uint32_t	CLK_GetCPUFreq (void)
	This function get CPU frequency. The frequency unit is Hz. More...

uint32_t	CLK_GetPCLK1Freq (void)
	This function get APB1 frequency. The frequency unit is Hz. More...

uint32_t	CLK_GetPCLK2Freq (void)
	This function get APB2 frequency. The frequency unit is Hz. More...

void	CLK_RefClkSrcConfig (uint32_t u32ClkSrc)
	This function set 16M ref clock source. More...

void	CLK_SYSCLKConfig (uint32_t u32ClkSrc, uint32_t freq_out)
	This function set HCLK clock source. More...

void	CLK_HCLKConfig (uint32_t u32ClkDiv)
	This function set CPU frequency divider. The frequency unit is Hz. More...

void	CLK_AHBPeriphClockCmd (uint32_t CLK_AHBPeriph, FunctionalState NewState)
	Enables or disables the AHB peripheral clock. More...

void	CLK_APB1PeriphClockCmd (uint32_t CLK_APB1Periph, FunctionalState NewState)
	Enables or disables the Low Speed APB (APB1) peripheral clock. More...

void	CLK_APB2PeriphClockCmd (uint32_t CLK_APB2Periph, FunctionalState NewState)
	Enables or disables the High Speed APB (APB2) peripheral clock. More...

uint32_t	CLK_WaitClockReady (uint32_t u32ClkMask)
	This function check selected clock source status. More...

uint32_t	CLK_Wait3vSyncReady (void)
	This function wait sync 3v clock locale stable. More...

void	CLK_Set3vSyncAuto (void)
	This function wait sync 3v clock locale stable by hardware. More...

void	CLK_SetWdtClkSrc (uint32_t u32clksel)
	This API is used to select wdt clock source. More...

void	CLK_SetWwdtClkSrc (uint32_t u32clksel)
	This API is used to select wwdt clock source. More...

void	CLK_SetTmrClkSrc (TIMER_T *timer, uint32_t u32clksel)
	This API is used to SELECT timer clock source. More...

uint32_t	CLK_GetPeripheralFreq (void *Peripheral)
	This API is used to get peripheral clk frequence. More...

Detailed Description

Panchip series clk driver header file.

Version: V1.00

Revision: 3

Date: 21/11/19 18:33

Macros

Enumerations

Functions

Detailed Description