Apb1 clk enable definitions. More...

Collaboration diagram for Apb1 clk enable:

Macros
#define	CLK_APB1Periph_I2C0 ((uint32_t)0x00000001)

#define	CLK_APB1Periph_SPI0 ((uint32_t)0x00000002)

#define	CLK_APB1Periph_UART0 ((uint32_t)0x00000008)

#define	CLK_APB1Periph_PWM0_CH01 ((uint32_t)0x00000010)

#define	CLK_APB1Periph_PWM0_CH23 ((uint32_t)0x00000020)

#define	CLK_APB1Periph_PWM0_CH45 ((uint32_t)0x00000040)

#define	CLK_APB1Periph_PWM0_CH67 ((uint32_t)0x00000080)

#define	CLK_APB1Periph_PWM0_EN ((uint32_t)0x00000100)

#define	CLK_APB1Periph_ADC ((uint32_t)0x00000200)

#define	CLK_APB1Periph_WDT ((uint32_t)0x00000400)

#define	CLK_APB1Periph_WWDT ((uint32_t)0x00000800)

#define	CLK_APB1Periph_TMR0 ((uint32_t)0x00001000)

#define	CLK_APB1Periph_I2SS ((uint32_t)0x00100000)

#define	CLK_APB1Periph_I2SM ((uint32_t)0x00200000)

#define	CLK_APB1Periph_PWM1_CH01 ((uint32_t)0x00400000)

#define	CLK_APB1Periph_PWM1_CH23 ((uint32_t)0x00800000)

#define	CLK_APB1Periph_PWM1_CH45 ((uint32_t)0x01000000)

#define	CLK_APB1Periph_PWM1_CH67 ((uint32_t)0x02000000)

#define	CLK_APB1Periph_PWM1_EN ((uint32_t)0x04000000)

#define	CLK_APB1Periph_PWM2_CH01 ((uint32_t)0x08000000)

#define	CLK_APB1Periph_PWM2_CH23 ((uint32_t)0x10000000)

#define	CLK_APB1Periph_PWM2_CH45 ((uint32_t)0x20000000)

#define	CLK_APB1Periph_PWM2_CH67 ((uint32_t)0x40000000)

#define	CLK_APB1Periph_PWM2_EN ((uint32_t)0x80000000)

#define	CLK_APB1Periph_All ((uint32_t)0xfff01ffb)

Detailed Description

Apb1 clk enable definitions.

Macro Definition Documentation

◆ CLK_APB1Periph_ADC

#define CLK_APB1Periph_ADC ((uint32_t)0x00000200)

Apb1 bus peripheral adc clk enable

◆ CLK_APB1Periph_All

#define CLK_APB1Periph_All ((uint32_t)0xfff01ffb)

Apb1 bus peripheral all clk enable

◆ CLK_APB1Periph_I2C0

#define CLK_APB1Periph_I2C0 ((uint32_t)0x00000001)

Apb1 bus peripheral i2c clk enable

◆ CLK_APB1Periph_I2SM

#define CLK_APB1Periph_I2SM ((uint32_t)0x00200000)

Apb1 bus peripheral i2s master clk enable

◆ CLK_APB1Periph_I2SS

#define CLK_APB1Periph_I2SS ((uint32_t)0x00100000)

Apb1 bus peripheral i2s slave clk enable

◆ CLK_APB1Periph_PWM0_CH01

#define CLK_APB1Periph_PWM0_CH01 ((uint32_t)0x00000010)

Apb1 bus peripheral pwm0 ch0 & ch1 clk enable

◆ CLK_APB1Periph_PWM0_CH23

#define CLK_APB1Periph_PWM0_CH23 ((uint32_t)0x00000020)

Apb1 bus peripheral pwm0 ch2 & ch3 clk enable

◆ CLK_APB1Periph_PWM0_CH45

#define CLK_APB1Periph_PWM0_CH45 ((uint32_t)0x00000040)

Apb1 bus peripheral pwm0 ch4 & ch5 clk enable

◆ CLK_APB1Periph_PWM0_CH67

#define CLK_APB1Periph_PWM0_CH67 ((uint32_t)0x00000080)

Apb1 bus peripheral pwm0 ch6 & ch7 clk enable

◆ CLK_APB1Periph_PWM0_EN

#define CLK_APB1Periph_PWM0_EN ((uint32_t)0x00000100)

Apb1 bus peripheral pwm0 clk enable

◆ CLK_APB1Periph_PWM1_CH01

#define CLK_APB1Periph_PWM1_CH01 ((uint32_t)0x00400000)

Apb1 bus peripheral pwm1 ch0 & ch1 clk enable

◆ CLK_APB1Periph_PWM1_CH23

#define CLK_APB1Periph_PWM1_CH23 ((uint32_t)0x00800000)

Apb1 bus peripheral pwm1 ch2 & ch3 clk enable

◆ CLK_APB1Periph_PWM1_CH45

#define CLK_APB1Periph_PWM1_CH45 ((uint32_t)0x01000000)

Apb1 bus peripheral pwm1 ch4 & ch5 clk enable

◆ CLK_APB1Periph_PWM1_CH67

#define CLK_APB1Periph_PWM1_CH67 ((uint32_t)0x02000000)

Apb1 bus peripheral pwm1 ch6 & ch7 clk enable

◆ CLK_APB1Periph_PWM1_EN

#define CLK_APB1Periph_PWM1_EN ((uint32_t)0x04000000)

Apb1 bus peripheral pwm1 clk enable

◆ CLK_APB1Periph_PWM2_CH01

#define CLK_APB1Periph_PWM2_CH01 ((uint32_t)0x08000000)

Apb1 bus peripheral pwm2 ch0 & ch1 clk enable

◆ CLK_APB1Periph_PWM2_CH23

#define CLK_APB1Periph_PWM2_CH23 ((uint32_t)0x10000000)

Apb1 bus peripheral pwm2 ch2 & ch3 clk enable

◆ CLK_APB1Periph_PWM2_CH45

#define CLK_APB1Periph_PWM2_CH45 ((uint32_t)0x20000000)

Apb1 bus peripheral pwm2 ch4 & ch5 clk enable

◆ CLK_APB1Periph_PWM2_CH67

#define CLK_APB1Periph_PWM2_CH67 ((uint32_t)0x40000000)

Apb1 bus peripheral pwm2 ch6 & ch7 clk enable

◆ CLK_APB1Periph_PWM2_EN

#define CLK_APB1Periph_PWM2_EN ((uint32_t)0x80000000)

Apb1 bus peripheral pwm2 clk enable

◆ CLK_APB1Periph_SPI0

#define CLK_APB1Periph_SPI0 ((uint32_t)0x00000002)

Apb1 bus peripheral spi0 clk enable

◆ CLK_APB1Periph_TMR0

#define CLK_APB1Periph_TMR0 ((uint32_t)0x00001000)

Apb1 bus peripheral timer0 clk enable

◆ CLK_APB1Periph_UART0

#define CLK_APB1Periph_UART0 ((uint32_t)0x00000008)

Apb1 bus peripheral uart0 clk enable

◆ CLK_APB1Periph_WDT

#define CLK_APB1Periph_WDT ((uint32_t)0x00000400)

Apb1 bus peripheral wdt clk enable

◆ CLK_APB1Periph_WWDT

#define CLK_APB1Periph_WWDT ((uint32_t)0x00000800)

Apb1 bus peripheral wwdt clk enable

Macros