31#define I2S_WORD_SEL_16_CYCLE (0)
32#define I2S_WORD_SEL_24_CYCLE (1)
33#define I2S_WORD_SEL_32_CYCLE (2)
39#define I2S_CLK_GATING_SEL_0_CYCLE (0)
40#define I2S_CLK_GATING_SEL_12_CYCLE (1)
41#define I2S_CLK_GATING_SEL_16_CYCLE (2)
42#define I2S_CLK_GATING_SEL_24_CYCLE (3)
43#define I2S_CLK_GATING_SEL_32_CYCLE (4)
49#define I2S_WORD_LEN_IGNORE (0)
50#define I2S_WORD_LEN_12_BIT_RESOLUTION (1)
51#define I2S_WORD_LEN_16_BIT_RESOLUTION (2)
52#define I2S_WORD_LEN_20_BIT_RESOLUTION (3)
53#define I2S_WORD_LEN_24_BIT_RESOLUTION (4)
54#define I2S_WORD_LEN_32_BIT_RESOLUTION (5)
60#define I2S_INT_TX_OVER (1<<5)
61#define I2S_INT_TX_EMPTY (1<<4)
62#define I2S_INT_RX_OVER (1<<1)
63#define I2S_INT_RX_VALID (1<<0)
64#define I2S_INT_NONE (0)
68#define I2S_ENABLE_COMMON_BIT0 (1)
70#define I2S_SCLK_GATING_Pos (0)
71#define I2S_SCLK_GATING_Msk (0x7ul << I2S_SCLK_GATING_Pos)
72#define I2S_WORD_SELECT_LEN_Pos (3)
73#define I2S_WORD_SELECT_LEN_Msk (0x3ul << I2S_WORD_SELECT_LEN_Pos)
76#define I2S_WORD_LENGTH_SET_Pos (0)
77#define I2S_WORD_LENGTH_SET_Msk (0x7ul << I2S_WORD_LENGTH_SET_Pos)
80#define I2S_SINGLE_STEREO_BUFSEL_L (0)
81#define I2S_SINGLE_STEREO_BUFSEL_R (1)
83#define I2S_SINGLE_STEREO_TX (1<<16)
84#define I2S_SINGLE_TX_BUFSEL_Pos (17)
85#define I2S_SINGLE_TX_BUFSEL_Msk (1<<I2S_SINGLE_TX_BUFSEL_Pos)
87#define I2S_SINGLE_STEREO_RX (1<<18)
88#define I2S_SINGLE_RX_BUFSEL_Pos (19)
89#define I2S_SINGLE_RX_BUFSEL_Msk (1<<I2S_SINGLE_RX_BUFSEL_Pos)
107 I2Sx->IER &= ~I2S_ENABLE_COMMON_BIT0;
125 I2Sx->IRER &= ~I2S_ENABLE_COMMON_BIT0;
143 I2Sx->ITER &= ~I2S_ENABLE_COMMON_BIT0;
161 I2Sx->CER &= ~I2S_ENABLE_COMMON_BIT0;
199 I2Sx->CH[Ch].RER &= ~I2S_ENABLE_COMMON_BIT0;
219 I2Sx->CH[Ch].TER &= ~I2S_ENABLE_COMMON_BIT0;
234 I2Sx->CH[Ch].IMR |= Msk;
250 I2Sx->CH[Ch].IMR &= ~Msk;
266 return (I2Sx->CH[Ch].IMR & Msk)?(
true):(
false);
278 I2Sx->CH[Ch].RFCR = Level;
289 I2Sx->CH[Ch].TFCR = Level;
339 return I2Sx->CH[Ch].ISR;
354 return (I2Sx->CH[Ch].ISR & Msk)?(
true):(
false);
365 I2Sx->CH[Ch].LTHR_LRBR = (uint16_t)Data;
375 return (uint16_t)I2Sx->CH[Ch].LTHR_LRBR;
387 I2Sx->CH[Ch].RTHR_RRBR = (uint16_t)Data;
397 return (uint16_t)I2Sx->CH[Ch].RTHR_RRBR;
519void I2S_Send(I2S_T *I2Sx,uint8_t Ch,uint32_t *LeftBuf,uint32_t *RightBuf,uint32_t Size);
530void I2S_Receive(I2S_T *I2Sx,uint8_t Ch,uint32_t *LeftBuf,uint32_t *RightBuf,uint32_t Size);
uint32_t I2S_ClearRxOverInt(I2S_T *i2s, uint8_t ch)
Clear rx fifo over interrupt status.
void I2S_Receive(I2S_T *I2Sx, uint8_t Ch, uint32_t *LeftBuf, uint32_t *RightBuf, uint32_t Size)
I2S send data.
void I2S_SetRecWordLen(I2S_T *i2s, uint8_t ch, uint8_t u8WordLen)
set I2s receive word length resolution,default:no word length
__STATIC_INLINE void I2S_SetTxTrigLevel(I2S_T *I2Sx, uint8_t Ch, uint8_t Level)
Set I2s tx trigger level.
Definition: pan_i2s.h:287
__STATIC_INLINE void I2S_DisableTransmitCh(I2S_T *I2Sx, uint8_t Ch)
Set I2s transmitter channel disable.
Definition: pan_i2s.h:217
__STATIC_INLINE void I2S_SetIntMsk(I2S_T *I2Sx, uint8_t Ch, uint8_t Msk)
Set I2s interrupt mask.
Definition: pan_i2s.h:232
#define I2S_SINGLE_STEREO_BUFSEL_R
Definition: pan_i2s.h:81
void I2S_SetTrmWordLen(I2S_T *i2s, uint8_t ch, uint8_t u8WordLen)
set I2s transmitter word length resolution,default:no word length
__STATIC_INLINE void I2S_EnableTransmitBlock(I2S_T *I2Sx)
Set I2s transmitter block enable.
Definition: pan_i2s.h:132
__STATIC_INLINE void I2S_SetTransmitChFifoRst(I2S_T *I2Sx, uint8_t Ch)
Set I2s transmitter channel fifo reset.
Definition: pan_i2s.h:307
__STATIC_INLINE void I2S_DisableRecBlock(I2S_T *I2Sx)
Set I2s received block disable.
Definition: pan_i2s.h:123
__STATIC_INLINE void I2S_EnableRecBlock(I2S_T *I2Sx)
Set I2s received block enable.
Definition: pan_i2s.h:114
#define I2S_SINGLE_TX_BUFSEL_Msk
Definition: pan_i2s.h:85
__STATIC_INLINE void I2S_RxSingleStereoBufSel(I2S_T *I2Sx, uint32_t bufSel)
buffer select in single stereo TX mode
Definition: pan_i2s.h:439
void I2S_Send(I2S_T *I2Sx, uint8_t Ch, uint32_t *LeftBuf, uint32_t *RightBuf, uint32_t Size)
I2S send data.
__STATIC_INLINE void I2S_TxSingleStereoEnable(I2S_T *I2Sx, bool enable)
Enable I2s single stereo TX function.
Definition: pan_i2s.h:406
__STATIC_INLINE void I2S_DisableRecChannel(I2S_T *I2Sx, uint8_t Ch)
Set I2s receive channel disable.
Definition: pan_i2s.h:197
uint32_t I2S_ClearTxOverInt(I2S_T *i2s, uint8_t ch)
Clear tx fifo over interrupt status.
__STATIC_INLINE void I2S_SetRecFifoRst(I2S_T *I2Sx)
Set I2s receive fifo reset.
Definition: pan_i2s.h:168
void I2S_SetWordSelectLen(I2S_T *i2s, uint8_t u8WordSel)
set I2s word select lenth,default 16 clk cycle
__STATIC_INLINE void I2S_EnableI2s(I2S_T *I2Sx)
Set I2s module enable.
Definition: pan_i2s.h:96
__STATIC_INLINE void I2S_TxSingleStereoBufSel(I2S_T *I2Sx, uint32_t bufSel)
buffer select in single stereo TX mode
Definition: pan_i2s.h:417
__STATIC_INLINE void I2S_WriteRightTransmitData(I2S_T *I2Sx, uint8_t Ch, uint16_t Data)
Write I2s right transmitter data.
Definition: pan_i2s.h:385
__STATIC_INLINE uint16_t I2S_ReadLeftRecData(I2S_T *I2Sx, uint8_t Ch)
Read I2s left receive data.
Definition: pan_i2s.h:373
#define I2S_SINGLE_STEREO_RX
Definition: pan_i2s.h:87
__STATIC_INLINE void I2S_SetTransmitFifoRst(I2S_T *I2Sx)
Set I2s transmitter fifo reset.
Definition: pan_i2s.h:177
__STATIC_INLINE uint16_t I2S_ReadRightRecData(I2S_T *I2Sx, uint8_t Ch)
Read I2s left receive data.
Definition: pan_i2s.h:395
__STATIC_INLINE void I2S_WriteLeftTransmitData(I2S_T *I2Sx, uint8_t Ch, uint16_t Data)
Write I2s left transmitter data.
Definition: pan_i2s.h:363
__STATIC_INLINE void I2S_ClearIntMsk(I2S_T *I2Sx, uint8_t Ch, uint8_t Msk)
Clear I2s interrupt mask.
Definition: pan_i2s.h:248
__STATIC_INLINE void I2S_WriteTxDmaDat(I2S_T *I2Sx, uint32_t Data)
Write I2s tx dma data.
Definition: pan_i2s.h:318
__STATIC_INLINE void I2S_DisableI2s(I2S_T *I2Sx)
Set I2s module disable.
Definition: pan_i2s.h:105
__STATIC_INLINE bool I2S_IsIntOccured(I2S_T *I2Sx, uint8_t Ch, uint8_t Msk)
Adjust which i2s interrupt occured.
Definition: pan_i2s.h:352
#define I2S_ENABLE_COMMON_BIT0
Definition: pan_i2s.h:68
#define I2S_SINGLE_RX_BUFSEL_Msk
Definition: pan_i2s.h:89
__STATIC_INLINE uint32_t I2S_ReadRxDmaDat(I2S_T *I2Sx)
Read I2s rx dma data.
Definition: pan_i2s.h:327
__STATIC_INLINE void I2S_SetRecChFifoRst(I2S_T *I2Sx, uint8_t Ch)
Set I2s receive channel fifo reset.
Definition: pan_i2s.h:297
__STATIC_INLINE void I2S_SetRxTrigLevel(I2S_T *I2Sx, uint8_t Ch, uint8_t Level)
Set I2s rx trigger level.
Definition: pan_i2s.h:276
__STATIC_INLINE uint8_t I2S_GetIntStatus(I2S_T *I2Sx, uint8_t Ch)
Get I2s interrupt status.
Definition: pan_i2s.h:337
__STATIC_INLINE void I2S_EnableClk(I2S_T *I2Sx)
Set I2s CLK generation enable.
Definition: pan_i2s.h:150
__STATIC_INLINE bool I2S_IsIntMsk(I2S_T *I2Sx, uint8_t Ch, uint8_t Msk)
Set I2s interrupt mask.
Definition: pan_i2s.h:264
__STATIC_INLINE void I2S_EnableTransmitCh(I2S_T *I2Sx, uint8_t Ch)
Set I2s transmitter channel enable.
Definition: pan_i2s.h:207
__STATIC_INLINE void I2S_DisableTransmitBlock(I2S_T *I2Sx)
Set I2s transmitter block disable.
Definition: pan_i2s.h:141
#define I2S_SINGLE_STEREO_TX
Definition: pan_i2s.h:83
void I2S_SetSclkGate(I2S_T *i2s, uint8_t u8SclkSel)
set I2s clk gating cycle,default:no gating
__STATIC_INLINE void I2S_DisableClk(I2S_T *I2Sx)
Set I2s CLK generation disable.
Definition: pan_i2s.h:159
__STATIC_INLINE void I2S_RxSingleStereoEnable(I2S_T *I2Sx, bool enable)
Enable I2s single stereo RX function.
Definition: pan_i2s.h:428
__STATIC_INLINE void I2S_EnRecChannel(I2S_T *I2Sx, uint8_t Ch)
Set I2s receive channel enable.
Definition: pan_i2s.h:187