PAN1080 Peripheral API
|
I2s Interface. More...
Modules | |
I2s word select | |
I2s word select cycles in the left or right sample mode. | |
I2s clk gating | |
I2s clk gating definition. | |
I2s data resolution select | |
I2s data resolution select definition. | |
I2s interrupt flag | |
I2s interrupt flag definition. | |
Macros | |
#define | I2S_ENABLE_COMMON_BIT0 (1) |
#define | I2S_SCLK_GATING_Pos (0) |
#define | I2S_SCLK_GATING_Msk (0x7ul << I2S_SCLK_GATING_Pos) |
#define | I2S_WORD_SELECT_LEN_Pos (3) |
#define | I2S_WORD_SELECT_LEN_Msk (0x3ul << I2S_WORD_SELECT_LEN_Pos) |
#define | I2S_WORD_LENGTH_SET_Pos (0) |
#define | I2S_WORD_LENGTH_SET_Msk (0x7ul << I2S_WORD_LENGTH_SET_Pos) |
#define | I2S_SINGLE_STEREO_BUFSEL_L (0) |
#define | I2S_SINGLE_STEREO_BUFSEL_R (1) |
#define | I2S_SINGLE_STEREO_TX (1<<16) |
#define | I2S_SINGLE_TX_BUFSEL_Pos (17) |
#define | I2S_SINGLE_TX_BUFSEL_Msk (1<<I2S_SINGLE_TX_BUFSEL_Pos) |
#define | I2S_SINGLE_STEREO_RX (1<<18) |
#define | I2S_SINGLE_RX_BUFSEL_Pos (19) |
#define | I2S_SINGLE_RX_BUFSEL_Msk (1<<I2S_SINGLE_RX_BUFSEL_Pos) |
Functions | |
__STATIC_INLINE void | I2S_EnableI2s (I2S_T *I2Sx) |
Set I2s module enable. More... | |
__STATIC_INLINE void | I2S_DisableI2s (I2S_T *I2Sx) |
Set I2s module disable. More... | |
__STATIC_INLINE void | I2S_EnableRecBlock (I2S_T *I2Sx) |
Set I2s received block enable. More... | |
__STATIC_INLINE void | I2S_DisableRecBlock (I2S_T *I2Sx) |
Set I2s received block disable. More... | |
__STATIC_INLINE void | I2S_EnableTransmitBlock (I2S_T *I2Sx) |
Set I2s transmitter block enable. More... | |
__STATIC_INLINE void | I2S_DisableTransmitBlock (I2S_T *I2Sx) |
Set I2s transmitter block disable. More... | |
__STATIC_INLINE void | I2S_EnableClk (I2S_T *I2Sx) |
Set I2s CLK generation enable. More... | |
__STATIC_INLINE void | I2S_DisableClk (I2S_T *I2Sx) |
Set I2s CLK generation disable. More... | |
__STATIC_INLINE void | I2S_SetRecFifoRst (I2S_T *I2Sx) |
Set I2s receive fifo reset. More... | |
__STATIC_INLINE void | I2S_SetTransmitFifoRst (I2S_T *I2Sx) |
Set I2s transmitter fifo reset. More... | |
__STATIC_INLINE void | I2S_EnRecChannel (I2S_T *I2Sx, uint8_t Ch) |
Set I2s receive channel enable. More... | |
__STATIC_INLINE void | I2S_DisableRecChannel (I2S_T *I2Sx, uint8_t Ch) |
Set I2s receive channel disable. More... | |
__STATIC_INLINE void | I2S_EnableTransmitCh (I2S_T *I2Sx, uint8_t Ch) |
Set I2s transmitter channel enable. More... | |
__STATIC_INLINE void | I2S_DisableTransmitCh (I2S_T *I2Sx, uint8_t Ch) |
Set I2s transmitter channel disable. More... | |
__STATIC_INLINE void | I2S_SetIntMsk (I2S_T *I2Sx, uint8_t Ch, uint8_t Msk) |
Set I2s interrupt mask. More... | |
__STATIC_INLINE void | I2S_ClearIntMsk (I2S_T *I2Sx, uint8_t Ch, uint8_t Msk) |
Clear I2s interrupt mask. More... | |
__STATIC_INLINE bool | I2S_IsIntMsk (I2S_T *I2Sx, uint8_t Ch, uint8_t Msk) |
Set I2s interrupt mask. More... | |
__STATIC_INLINE void | I2S_SetRxTrigLevel (I2S_T *I2Sx, uint8_t Ch, uint8_t Level) |
Set I2s rx trigger level. More... | |
__STATIC_INLINE void | I2S_SetTxTrigLevel (I2S_T *I2Sx, uint8_t Ch, uint8_t Level) |
Set I2s tx trigger level. More... | |
__STATIC_INLINE void | I2S_SetRecChFifoRst (I2S_T *I2Sx, uint8_t Ch) |
Set I2s receive channel fifo reset. More... | |
__STATIC_INLINE void | I2S_SetTransmitChFifoRst (I2S_T *I2Sx, uint8_t Ch) |
Set I2s transmitter channel fifo reset. More... | |
__STATIC_INLINE void | I2S_WriteTxDmaDat (I2S_T *I2Sx, uint32_t Data) |
Write I2s tx dma data. More... | |
__STATIC_INLINE uint32_t | I2S_ReadRxDmaDat (I2S_T *I2Sx) |
Read I2s rx dma data. More... | |
__STATIC_INLINE uint8_t | I2S_GetIntStatus (I2S_T *I2Sx, uint8_t Ch) |
Get I2s interrupt status. More... | |
__STATIC_INLINE bool | I2S_IsIntOccured (I2S_T *I2Sx, uint8_t Ch, uint8_t Msk) |
Adjust which i2s interrupt occured. More... | |
__STATIC_INLINE void | I2S_WriteLeftTransmitData (I2S_T *I2Sx, uint8_t Ch, uint16_t Data) |
Write I2s left transmitter data. More... | |
__STATIC_INLINE uint16_t | I2S_ReadLeftRecData (I2S_T *I2Sx, uint8_t Ch) |
Read I2s left receive data. More... | |
__STATIC_INLINE void | I2S_WriteRightTransmitData (I2S_T *I2Sx, uint8_t Ch, uint16_t Data) |
Write I2s right transmitter data. More... | |
__STATIC_INLINE uint16_t | I2S_ReadRightRecData (I2S_T *I2Sx, uint8_t Ch) |
Read I2s left receive data. More... | |
__STATIC_INLINE void | I2S_TxSingleStereoEnable (I2S_T *I2Sx, bool enable) |
Enable I2s single stereo TX function. More... | |
__STATIC_INLINE void | I2S_TxSingleStereoBufSel (I2S_T *I2Sx, uint32_t bufSel) |
buffer select in single stereo TX mode More... | |
__STATIC_INLINE void | I2S_RxSingleStereoEnable (I2S_T *I2Sx, bool enable) |
Enable I2s single stereo RX function. More... | |
__STATIC_INLINE void | I2S_RxSingleStereoBufSel (I2S_T *I2Sx, uint32_t bufSel) |
buffer select in single stereo TX mode More... | |
void | I2S_SetWordSelectLen (I2S_T *i2s, uint8_t u8WordSel) |
set I2s word select lenth,default 16 clk cycle More... | |
void | I2S_SetSclkGate (I2S_T *i2s, uint8_t u8SclkSel) |
set I2s clk gating cycle,default:no gating More... | |
void | I2S_SetRecWordLen (I2S_T *i2s, uint8_t ch, uint8_t u8WordLen) |
set I2s receive word length resolution,default:no word length More... | |
void | I2S_SetTrmWordLen (I2S_T *i2s, uint8_t ch, uint8_t u8WordLen) |
set I2s transmitter word length resolution,default:no word length More... | |
uint32_t | I2S_ClearRxOverInt (I2S_T *i2s, uint8_t ch) |
Clear rx fifo over interrupt status. More... | |
uint32_t | I2S_ClearTxOverInt (I2S_T *i2s, uint8_t ch) |
Clear tx fifo over interrupt status. More... | |
void | I2S_Send (I2S_T *I2Sx, uint8_t Ch, uint32_t *LeftBuf, uint32_t *RightBuf, uint32_t Size) |
I2S send data. More... | |
void | I2S_Receive (I2S_T *I2Sx, uint8_t Ch, uint32_t *LeftBuf, uint32_t *RightBuf, uint32_t Size) |
I2S send data. More... | |
I2s Interface.
#define I2S_ENABLE_COMMON_BIT0 (1) |
General common bit value
#define I2S_SCLK_GATING_Msk (0x7ul << I2S_SCLK_GATING_Pos) |
I2s sclk gating control bit mask value
#define I2S_SCLK_GATING_Pos (0) |
Position of I2s sclk gating control bit
#define I2S_SINGLE_RX_BUFSEL_Msk (1<<I2S_SINGLE_RX_BUFSEL_Pos) |
I2s singal stereo receive buffer select control bit mask value
#define I2S_SINGLE_RX_BUFSEL_Pos (19) |
Position of I2s singal stereo receive buffer select control bit
#define I2S_SINGLE_STEREO_BUFSEL_L (0) |
I2s left buffer selected
#define I2S_SINGLE_STEREO_BUFSEL_R (1) |
I2s right buffer selected
#define I2S_SINGLE_STEREO_RX (1<<18) |
I2s singal stereo receive enable bit
#define I2S_SINGLE_STEREO_TX (1<<16) |
I2s singal stereo transmit enable bit
#define I2S_SINGLE_TX_BUFSEL_Msk (1<<I2S_SINGLE_TX_BUFSEL_Pos) |
I2s singal stereo transmit buffer select control bit mask value
#define I2S_SINGLE_TX_BUFSEL_Pos (17) |
Position of I2s singal stereo transmit buffer select control bit
#define I2S_WORD_LENGTH_SET_Msk (0x7ul << I2S_WORD_LENGTH_SET_Pos) |
I2s data resolution control bit mask value
#define I2S_WORD_LENGTH_SET_Pos (0) |
Position of I2s data resolution control bit
#define I2S_WORD_SELECT_LEN_Msk (0x3ul << I2S_WORD_SELECT_LEN_Pos) |
I2s word lenth select control bit mask value
#define I2S_WORD_SELECT_LEN_Pos (3) |
Position of I2s word lenth select control bit
__STATIC_INLINE void I2S_ClearIntMsk | ( | I2S_T * | I2Sx, |
uint8_t | Ch, | ||
uint8_t | Msk | ||
) |
Clear I2s interrupt mask.
I2Sx | The base address of i2s module |
Ch | i2s channel select |
Msk | interrupt status: I2S_INT_TX_OVER I2S_INT_TX_EMPTY I2S_INT_RX_OVER I2S_INT_RX_VALID |
uint32_t I2S_ClearRxOverInt | ( | I2S_T * | i2s, |
uint8_t | ch | ||
) |
Clear rx fifo over interrupt status.
i2s | The base address of i2s module |
ch | i2s channel select |
NONE |
uint32_t I2S_ClearTxOverInt | ( | I2S_T * | i2s, |
uint8_t | ch | ||
) |
Clear tx fifo over interrupt status.
i2s | The base address of i2s module |
ch | i2s channel select |
NONE |
__STATIC_INLINE void I2S_DisableClk | ( | I2S_T * | I2Sx | ) |
Set I2s CLK generation disable.
I2Sx | The base address of i2s module |
__STATIC_INLINE void I2S_DisableI2s | ( | I2S_T * | I2Sx | ) |
Set I2s module disable.
I2Sx | The base address of i2s module |
__STATIC_INLINE void I2S_DisableRecBlock | ( | I2S_T * | I2Sx | ) |
Set I2s received block disable.
I2Sx | The base address of i2s module |
__STATIC_INLINE void I2S_DisableRecChannel | ( | I2S_T * | I2Sx, |
uint8_t | Ch | ||
) |
Set I2s receive channel disable.
I2Sx | The base address of i2s module |
Ch | I2s channel select |
__STATIC_INLINE void I2S_DisableTransmitBlock | ( | I2S_T * | I2Sx | ) |
Set I2s transmitter block disable.
I2Sx | The base address of i2s module |
__STATIC_INLINE void I2S_DisableTransmitCh | ( | I2S_T * | I2Sx, |
uint8_t | Ch | ||
) |
Set I2s transmitter channel disable.
I2Sx | The base address of i2s module |
Ch | I2s channel select |
__STATIC_INLINE void I2S_EnableClk | ( | I2S_T * | I2Sx | ) |
Set I2s CLK generation enable.
I2Sx | The base address of i2s module |
__STATIC_INLINE void I2S_EnableI2s | ( | I2S_T * | I2Sx | ) |
Set I2s module enable.
I2Sx | The base address of i2s module |
__STATIC_INLINE void I2S_EnableRecBlock | ( | I2S_T * | I2Sx | ) |
Set I2s received block enable.
I2Sx | The base address of i2s module |
__STATIC_INLINE void I2S_EnableTransmitBlock | ( | I2S_T * | I2Sx | ) |
Set I2s transmitter block enable.
I2Sx | The base address of i2s module |
__STATIC_INLINE void I2S_EnableTransmitCh | ( | I2S_T * | I2Sx, |
uint8_t | Ch | ||
) |
Set I2s transmitter channel enable.
I2Sx | The base address of i2s module |
Ch | I2s channel number |
__STATIC_INLINE void I2S_EnRecChannel | ( | I2S_T * | I2Sx, |
uint8_t | Ch | ||
) |
Set I2s receive channel enable.
I2Sx | The base address of i2s module |
Ch | I2s channel select |
__STATIC_INLINE uint8_t I2S_GetIntStatus | ( | I2S_T * | I2Sx, |
uint8_t | Ch | ||
) |
Get I2s interrupt status.
I2Sx | The base address of i2s module |
Ch | i2s channel select |
__STATIC_INLINE bool I2S_IsIntMsk | ( | I2S_T * | I2Sx, |
uint8_t | Ch, | ||
uint8_t | Msk | ||
) |
Set I2s interrupt mask.
I2Sx | The base address of i2s module |
Ch | i2s channel select |
Msk | interrupt status: I2S_INT_TX_OVER I2S_INT_TX_EMPTY I2S_INT_RX_OVER I2S_INT_RX_VALID |
__STATIC_INLINE bool I2S_IsIntOccured | ( | I2S_T * | I2Sx, |
uint8_t | Ch, | ||
uint8_t | Msk | ||
) |
Adjust which i2s interrupt occured.
I2Sx | The base address of i2s module |
Ch | i2s channel select |
Msk | interrupt status: I2S_INT_TX_OVER I2S_INT_TX_EMPTY I2S_INT_RX_OVER I2S_INT_RX_VALID |
__STATIC_INLINE uint16_t I2S_ReadLeftRecData | ( | I2S_T * | I2Sx, |
uint8_t | Ch | ||
) |
Read I2s left receive data.
I2Sx | The base address of i2s module |
Ch | i2s channel select |
__STATIC_INLINE uint16_t I2S_ReadRightRecData | ( | I2S_T * | I2Sx, |
uint8_t | Ch | ||
) |
Read I2s left receive data.
I2Sx | The base address of i2s module |
Ch | i2s channel select |
__STATIC_INLINE uint32_t I2S_ReadRxDmaDat | ( | I2S_T * | I2Sx | ) |
Read I2s rx dma data.
I2Sx | The base address of i2s module |
void I2S_Receive | ( | I2S_T * | I2Sx, |
uint8_t | Ch, | ||
uint32_t * | LeftBuf, | ||
uint32_t * | RightBuf, | ||
uint32_t | Size | ||
) |
I2S send data.
I2Sx | The base address of i2s module |
Ch | i2s channel select |
LeftBuf | left channel data buffer |
RightBuf | right channel data buffer |
Size | send data number |
NONE |
__STATIC_INLINE void I2S_RxSingleStereoBufSel | ( | I2S_T * | I2Sx, |
uint32_t | bufSel | ||
) |
buffer select in single stereo TX mode
i2s | The base address of i2s module |
bufSel | left or right stereo select |
none |
__STATIC_INLINE void I2S_RxSingleStereoEnable | ( | I2S_T * | I2Sx, |
bool | enable | ||
) |
Enable I2s single stereo RX function.
i2s | The base address of i2s module |
enable | RX single stereo enable or not |
none |
void I2S_Send | ( | I2S_T * | I2Sx, |
uint8_t | Ch, | ||
uint32_t * | LeftBuf, | ||
uint32_t * | RightBuf, | ||
uint32_t | Size | ||
) |
I2S send data.
I2Sx | The base address of i2s module |
Ch | i2s channel select |
LeftBuf | left channel data buffer |
RightBuf | right channel data buffer |
Size | send data number |
NONE |
__STATIC_INLINE void I2S_SetIntMsk | ( | I2S_T * | I2Sx, |
uint8_t | Ch, | ||
uint8_t | Msk | ||
) |
Set I2s interrupt mask.
I2Sx | The base address of i2s module |
Ch | I2s channel select |
Msk | interrupt status: I2S_INT_TX_OVER I2S_INT_TX_EMPTY I2S_INT_RX_OVER I2S_INT_RX_VALID |
__STATIC_INLINE void I2S_SetRecChFifoRst | ( | I2S_T * | I2Sx, |
uint8_t | Ch | ||
) |
Set I2s receive channel fifo reset.
I2Sx | The base address of i2s module |
Ch | i2s channel select |
__STATIC_INLINE void I2S_SetRecFifoRst | ( | I2S_T * | I2Sx | ) |
Set I2s receive fifo reset.
I2Sx | The base address of i2s module |
void I2S_SetRecWordLen | ( | I2S_T * | i2s, |
uint8_t | ch, | ||
uint8_t | u8WordLen | ||
) |
set I2s receive word length resolution,default:no word length
i2s | The base address of i2s module |
ch | i2s channel select |
u8WordLen | word length resolution select: I2S_WORD_LEN_IGNORE I2S_WORD_LEN_12_BIT_RESOLUTION I2S_WORD_LEN_16_BIT_RESOLUTION I2S_WORD_LEN_20_BIT_RESOLUTION I2S_WORD_LEN_24_BIT_RESOLUTION I2S_WORD_LEN_32_BIT_RESOLUTION |
__STATIC_INLINE void I2S_SetRxTrigLevel | ( | I2S_T * | I2Sx, |
uint8_t | Ch, | ||
uint8_t | Level | ||
) |
Set I2s rx trigger level.
I2Sx | The base address of i2s module |
Ch | i2s channel select |
Level | trigger level |
void I2S_SetSclkGate | ( | I2S_T * | i2s, |
uint8_t | u8SclkSel | ||
) |
set I2s clk gating cycle,default:no gating
i2s | The base address of i2s module |
u8SclkSel | gating select: I2S_CLK_GATING_SEL_0_CYCLE I2S_CLK_GATING_SEL_12_CYCLE I2S_CLK_GATING_SEL_16_CYCLE I2S_CLK_GATING_SEL_24_CYCLE I2S_CLK_GATING_SEL_32_CYCLE |
__STATIC_INLINE void I2S_SetTransmitChFifoRst | ( | I2S_T * | I2Sx, |
uint8_t | Ch | ||
) |
Set I2s transmitter channel fifo reset.
I2Sx | The base address of i2s module |
Ch | i2s channel select |
__STATIC_INLINE void I2S_SetTransmitFifoRst | ( | I2S_T * | I2Sx | ) |
Set I2s transmitter fifo reset.
I2Sx | The base address of i2s module |
void I2S_SetTrmWordLen | ( | I2S_T * | i2s, |
uint8_t | ch, | ||
uint8_t | u8WordLen | ||
) |
set I2s transmitter word length resolution,default:no word length
i2s | The base address of i2s module |
ch | i2s channel select |
u8WordLen | word length resolution select: I2S_WORD_LEN_IGNORE I2S_WORD_LEN_12_BIT_RESOLUTION I2S_WORD_LEN_16_BIT_RESOLUTION I2S_WORD_LEN_20_BIT_RESOLUTION I2S_WORD_LEN_24_BIT_RESOLUTION I2S_WORD_LEN_32_BIT_RESOLUTION |
None |
__STATIC_INLINE void I2S_SetTxTrigLevel | ( | I2S_T * | I2Sx, |
uint8_t | Ch, | ||
uint8_t | Level | ||
) |
Set I2s tx trigger level.
I2Sx | The base address of i2s module |
Ch | i2s channel select |
Level | trigger level |
void I2S_SetWordSelectLen | ( | I2S_T * | i2s, |
uint8_t | u8WordSel | ||
) |
set I2s word select lenth,default 16 clk cycle
i2s | The base address of i2s module |
u8WordSel | sclk cycle select I2S_WORD_SEL_16_CYCLE I2S_WORD_SEL_24_CYCLE I2S_WORD_SEL_32_CYCLE |
__STATIC_INLINE void I2S_TxSingleStereoBufSel | ( | I2S_T * | I2Sx, |
uint32_t | bufSel | ||
) |
buffer select in single stereo TX mode
i2s | The base address of i2s module |
bufSel | left or right stereo select |
none |
__STATIC_INLINE void I2S_TxSingleStereoEnable | ( | I2S_T * | I2Sx, |
bool | enable | ||
) |
Enable I2s single stereo TX function.
i2s | The base address of i2s module |
enable | TX single stereo enable or not |
none |
__STATIC_INLINE void I2S_WriteLeftTransmitData | ( | I2S_T * | I2Sx, |
uint8_t | Ch, | ||
uint16_t | Data | ||
) |
Write I2s left transmitter data.
I2Sx | The base address of i2s module |
Ch | i2s channel select |
Data | write data,16bit data aligned |
__STATIC_INLINE void I2S_WriteRightTransmitData | ( | I2S_T * | I2Sx, |
uint8_t | Ch, | ||
uint16_t | Data | ||
) |
Write I2s right transmitter data.
I2Sx | The base address of i2s module |
Ch | i2s channel select |
Data | write data,16bit data aligned |
__STATIC_INLINE void I2S_WriteTxDmaDat | ( | I2S_T * | I2Sx, |
uint32_t | Data | ||
) |
Write I2s tx dma data.
I2Sx | The base address of i2s module |
Data | write data |