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PAN1080 Peripheral API
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Adc Interface. More...

Modules | |
| Adc interrupt | |
| Adc interrupt control. | |
| Adc sample clock | |
| Adc sample clock time. | |
| Adc sequential mode | |
| Adc sequential mode control. | |
Macros | |
| #define | ADC_INPUTRANGE_HIGH (1UL) |
| #define | ADC_INPUTRANGE_LOW (0UL) |
| #define | ADC_CH8_EXT (0UL) |
| #define | ADC_CH8_BGP (ADC_CHEN_CH8SEL_Msk) |
| #define | ADC_CMP0_LESS_THAN (0UL << ADC_CMP0_CMPCOND_Pos) |
| #define | ADC_CMP1_LESS_THAN (0UL << ADC_CMP1_CMPCOND_Pos) |
| #define | ADC_CMP0_GREATER_OR_EQUAL_TO (1ul << ADC_CMP0_CMPCOND_Pos) |
| #define | ADC_CMP1_GREATER_OR_EQUAL_TO (1ul << ADC_CMP1_CMPCOND_Pos) |
| #define | ADC_TRIGGER_BY_EXT_PIN (0UL << ADC_CTL_HWTRGSEL_Pos) |
| #define | ADC_TRIGGER_BY_PWM (ADC_CTL_HWTRGSEL_Msk) |
| #define | ADC_FALLING_EDGE_TRIGGER (0UL << ADC_CTL_HWTRGCOND_Pos) |
| #define | ADC_RISING_EDGE_TRIGGER (ADC_CTL_HWTRGCOND_Msk) |
| #define | ADC_COMPARATOR_0 (0) |
| #define | ADC_COMPARATOR_1 (1) |
| #define | ADC_FIFO_TRIG_LEVEL_HALF (0) |
| #define | ADC_FIFO_TRIG_LEVEL_FULL (1) |
Functions | |
| __STATIC_INLINE uint32_t | ADC_GetConversionData (ADC_T *ADCx) |
| Get the latest ADC conversion data. More... | |
| __STATIC_INLINE bool | ADC_StatusFlag (ADC_T *ADCx, uint32_t IntMask) |
| Get raw status flag. More... | |
| __STATIC_INLINE void | ADC_ClearStatusFlag (ADC_T *ADCx, uint32_t IntMask) |
| Clear specified interrupt flag. More... | |
| __STATIC_INLINE void | ADC_IntMask (ADC_T *ADCx, uint32_t IntMask, FunctionalState NewState) |
| Set interrupt mask,if masked,interrupt will not be happened. More... | |
| __STATIC_INLINE bool | ADC_IsIntOccured (ADC_T *ADCx, uint32_t IntMask) |
| adjust the user-specified interrupt occured or not More... | |
| __STATIC_INLINE void | ADC_ClearIntFlag (ADC_T *ADCx, uint32_t IntMask) |
| This macro clear the selected interrupt status bits. More... | |
| __STATIC_INLINE bool | ADC_IsBusy (ADC_T *ADCx) |
| Get the busy state of ADC. More... | |
| __STATIC_INLINE bool | ADC_IsDataOverrun (ADC_T *ADCx) |
| Check if the ADC conversion data is over written or not. More... | |
| __STATIC_INLINE bool | ADC_IsDataValid (ADC_T *ADCx) |
| Check if the ADC conversion data is valid or not. More... | |
| __STATIC_INLINE void | ADC_PowerDown (ADC_T *ADCx) |
| Power down ADC module. More... | |
| __STATIC_INLINE void | ADC_PowerOn (ADC_T *ADCx) |
| Power on ADC module. More... | |
| __STATIC_INLINE void | ADC_SequentialModeDisable (ADC_T *ADCx) |
| ADC sequential mode Disabled. More... | |
| __STATIC_INLINE void | ADC_Trigger2Select (ADC_T *ADCx, FunctionalState NewState) |
| TRG1CTL select for 1-shunt sequential mode. More... | |
| __STATIC_INLINE void | ADC_DisableCompare0 (ADC_T *ADCx) |
| Disable comparator 0. More... | |
| __STATIC_INLINE void | ADC_DisableCompare1 (ADC_T *ADCx) |
| Disable comparator 1. More... | |
| __STATIC_INLINE void | ADC_StartConvert (ADC_T *ADCx) |
| Start the A/D conversion. More... | |
| __STATIC_INLINE void | ADC_StopConvert (ADC_T *ADCx) |
| Stop the A/D conversion. More... | |
| __STATIC_INLINE void | ADC_TestModeEnable (ADC_T *ADCx) |
| Enable the A/D test mode. More... | |
| __STATIC_INLINE void | ADC_TestModeDisable (ADC_T *ADCx) |
| Disable the A/D test mode. More... | |
| __STATIC_INLINE void | ADC_DmaModeEnable (ADC_T *ADCx, FunctionalState NewState) |
| Enable the A/D dma mode. More... | |
| __STATIC_INLINE void | ADC_SetClockDivider (ADC_T *ADCx, uint32_t Divider) |
| Set the A/D clock division. More... | |
| __STATIC_INLINE void | ADC_Open (ADC_T *ADCx, uint32_t ChMask) |
| This API configures ADC module to be ready for convert the input from selected channel. More... | |
| __STATIC_INLINE void | ADC_SelInputRange (ADC_T *ADCx, uint32_t EnableHigh) |
| Select ADC range of input sample signal. More... | |
| __STATIC_INLINE void | ADC_TriggerDelay (ADC_T *ADCx, uint32_t Data) |
| Delay ADC start conversion time after PWM trigger. More... | |
| __STATIC_INLINE void | ADC_SetExtraSampleTime (ADC_T *ADCx, uint32_t SampleTime) |
| Set ADC sample time for designated channel. More... | |
| __STATIC_INLINE bool | ADC_IsOneChConvertEnd (ADC_T *ADCx) |
| adjust pwm sequence convert end or not in adc one channel More... | |
| __STATIC_INLINE void | ADC_ClearByHw (ADC_T *ADCx, FunctionalState NewState) |
| clear pwm sequence end flag More... | |
| __STATIC_INLINE void | ADC_LeftShiftEn (ADC_T *ADCx, FunctionalState NewState) |
| enable left shift function,if enable,adc data {adc_output[11:0],4'b0 } More... | |
| __STATIC_INLINE uint32_t | ADC_GetLeftShiftData (ADC_T *ADCx) |
| get left shift data More... | |
| __STATIC_INLINE void | ADC_SubtractBiasEn (ADC_T *ADCx, FunctionalState NewState) |
| enable subtract bias function More... | |
| __STATIC_INLINE void | ADC_SetBiasData (ADC_T *ADCx, uint32_t BiasData) |
| set bias data More... | |
| __STATIC_INLINE uint32_t | ADC_GetLeftBiasData (ADC_T *ADCx) |
| get adc data after bias & left shift More... | |
| __STATIC_INLINE void | ADC_SetFifoTrigLevel (ADC_T *ADCx, uint8_t Level) |
| set adc fifo trig level More... | |
| __STATIC_INLINE uint32_t | ADC_GetFifoPopData (ADC_T *ADCx) |
| get fifo pop data More... | |
| __STATIC_INLINE void | ADC_SeqModeOneChEn (ADC_T *ADCx, FunctionalState NewState) |
| pwm sequential enable in adc one channel mode More... | |
| __STATIC_INLINE void | ADC_SeqModeChSelect (ADC_T *ADCx, uint8_t Ch) |
| adc channel select in pwm sequential More... | |
| void | ADC_Disable (ADC_T *ADCx) |
| Disable ADC Power. More... | |
| void | ADC_Close (void) |
| Close ADC peripheral. More... | |
| void | ADC_EnableHWTrigger (ADC_T *ADCx, uint32_t Source, uint32_t Param) |
| Configure the hardware trigger condition and enable hardware trigger. More... | |
| void | ADC_DisableHWTrigger (ADC_T *ADCx) |
| Disable hardware trigger ADC function. More... | |
| void | ADC_EnableInt (ADC_T *ADCx, uint32_t Mask) |
| Enable the interrupt(s) selected by u32Mask parameter. More... | |
| void | ADC_DisableInt (ADC_T *ADCx, uint32_t Mask) |
| Disable the interrupt(s) selected by u32Mask parameter. More... | |
| void | ADC_SeqModeEnable (ADC_T *ADCx, uint32_t SeqTYPE, uint32_t ModeSel) |
| ADC PWM Sequential Mode Control. More... | |
| void | ADC_SeqModeTriggerSrc (ADC_T *ADCx, uint32_t SeqModeTriSrc) |
| ADC PWM Sequential Mode PWM Trigger Source and type. More... | |
| void | ADC_CompareEnable (ADC_T *ADCx, uint32_t ChNum, uint32_t CmpCondition, uint32_t CmpData, uint32_t MatchCnt, uint32_t CmpSelect) |
| Configure the comparator 0 and enable it. More... | |
| void | ADC_SeqOneChModeConfig (ADC_T *ADCx, uint32_t Trig, uint8_t Level, uint8_t DmaEn, uint8_t HwClrEN, uint8_t AdcCh) |
| set ADC PWM one channel Sequential Mode configuration. More... | |
Adc Interface.
| #define ADC_CH8_BGP (ADC_CHEN_CH8SEL_Msk) |
Use internal band-gap voltage (VBG) as channel 8 source.
| #define ADC_CH8_EXT (0UL) |
Use external input pin as ADC channel 8 source
| #define ADC_CMP0_GREATER_OR_EQUAL_TO (1ul << ADC_CMP0_CMPCOND_Pos) |
ADC compare condition greater or equal to
| #define ADC_CMP0_LESS_THAN (0UL << ADC_CMP0_CMPCOND_Pos) |
ADC compare condition less than
| #define ADC_CMP1_GREATER_OR_EQUAL_TO (1ul << ADC_CMP1_CMPCOND_Pos) |
ADC compare condition greater or equal to
| #define ADC_CMP1_LESS_THAN (0UL << ADC_CMP1_CMPCOND_Pos) |
ADC compare condition less than
| #define ADC_COMPARATOR_0 (0) |
ADC comparator 0 selected
| #define ADC_COMPARATOR_1 (1) |
ADC comparator 0 selected
| #define ADC_FALLING_EDGE_TRIGGER (0UL << ADC_CTL_HWTRGCOND_Pos) |
External pin falling edge trigger ADC
| #define ADC_FIFO_TRIG_LEVEL_FULL (1) |
ADC full fifo threshold level setted
| #define ADC_FIFO_TRIG_LEVEL_HALF (0) |
ADC half fifo threshold level setted
| #define ADC_INPUTRANGE_HIGH (1UL) |
ADC input range 0V~VDD
| #define ADC_INPUTRANGE_LOW (0UL) |
ADC input range 0V~1.2V
| #define ADC_RISING_EDGE_TRIGGER (ADC_CTL_HWTRGCOND_Msk) |
External pin rising edge trigger ADC
| #define ADC_TRIGGER_BY_EXT_PIN (0UL << ADC_CTL_HWTRGSEL_Pos) |
ADC trigger by STADC (P3.2) pin
| #define ADC_TRIGGER_BY_PWM (ADC_CTL_HWTRGSEL_Msk) |
ADC trigger by PWM events
| __STATIC_INLINE void ADC_ClearByHw | ( | ADC_T * | ADCx, |
| FunctionalState | NewState | ||
| ) |
clear pwm sequence end flag
| [in] | ADCx | Base address of ADC module |
| [in] | NewState | new state of clear mode in pwm sequence one channel mode |
| __STATIC_INLINE void ADC_ClearIntFlag | ( | ADC_T * | ADCx, |
| uint32_t | IntMask | ||
| ) |
This macro clear the selected interrupt status bits.
| [in] | ADCx | Base address of ADC module |
| [in] | IntMask | The combination of following interrupt status bits. Each bit corresponds to a interrupt status. |
| __STATIC_INLINE void ADC_ClearStatusFlag | ( | ADC_T * | ADCx, |
| uint32_t | IntMask | ||
| ) |
Clear specified interrupt flag.
| [in] | ADCx | Base address of ADC module |
| [in] | IntMask | The combination of following status bits. Each bit corresponds to a status flag.
|
| void ADC_Close | ( | void | ) |
Close ADC peripheral.
| void ADC_CompareEnable | ( | ADC_T * | ADCx, |
| uint32_t | ChNum, | ||
| uint32_t | CmpCondition, | ||
| uint32_t | CmpData, | ||
| uint32_t | MatchCnt, | ||
| uint32_t | CmpSelect | ||
| ) |
Configure the comparator 0 and enable it.
| [in] | ADCx | Base address of ADC module |
| [in] | ChNum | Specifies the source channel, valid value are from 0 to 7 |
| [in] | CmpCondition | Specifies the compare condition |
| [in] | CmpData | Specifies the compare value. Valid value are between 0 ~ 0x3FF |
| [in] | MatchCnt | Specifies the match count setting, valid values are between 1~16 |
| [in] | CmpSelect | comparator select,0 or 1 |
For example, ADC_CompareEnable(ADC, 5, ADC_CMP_GREATER_OR_EQUAL_TO, 0x800, 10,ADC_COMPARATOR_0); Means ADC will assert comparator 0 flag if channel 5 conversion result is greater or equal to 0x800 for 10 times continuously.
| void ADC_Disable | ( | ADC_T * | ADCx | ) |
Disable ADC Power.
| [in] | ADCx | Base address of ADC module |
| __STATIC_INLINE void ADC_DisableCompare0 | ( | ADC_T * | ADCx | ) |
Disable comparator 0.
| [in] | ADCx | Base address of ADC module |
| __STATIC_INLINE void ADC_DisableCompare1 | ( | ADC_T * | ADCx | ) |
Disable comparator 1.
| [in] | ADCx | Base address of ADC module |
| void ADC_DisableHWTrigger | ( | ADC_T * | ADCx | ) |
Disable hardware trigger ADC function.
| [in] | ADCx | Base address of ADC module |
| void ADC_DisableInt | ( | ADC_T * | ADCx, |
| uint32_t | Mask | ||
| ) |
Disable the interrupt(s) selected by u32Mask parameter.
| [in] | ADCx | Base address of ADC module |
| [in] | Mask | The combination of interrupt status bits listed below. Each bit corresponds to a interrupt status. This parameter decides which interrupts will be disabled. |
| __STATIC_INLINE void ADC_DmaModeEnable | ( | ADC_T * | ADCx, |
| FunctionalState | NewState | ||
| ) |
Enable the A/D dma mode.
| [in] | ADCx | Base address of ADC module |
| [in] | NewState | new state of clear mode in pwm sequence one channel mode |
| void ADC_EnableHWTrigger | ( | ADC_T * | ADCx, |
| uint32_t | Source, | ||
| uint32_t | Param | ||
| ) |
Configure the hardware trigger condition and enable hardware trigger.
| [in] | ADCx | Base address of ADC module |
| [in] | Source | Decides the hardware trigger source. Valid values are: |
| [in] | Param | While ADC trigger by PWM, this parameter is used to set the delay between PWM trigger and ADC conversion. Valid values are from 0 ~ 0xFF, and actual delay time is (4 * u32Param * HCLK). While ADC trigger by external pin, this parameter is used to set trigger condition. Valid values are: |
| void ADC_EnableInt | ( | ADC_T * | ADCx, |
| uint32_t | Mask | ||
| ) |
Enable the interrupt(s) selected by u32Mask parameter.
| [in] | ADCx | Base address of ADC module |
| [in] | Mask | The combination of interrupt status bits listed below. Each bit corresponds to a interrupt status. This parameter decides which interrupts will be enabled. |
| __STATIC_INLINE uint32_t ADC_GetConversionData | ( | ADC_T * | ADCx | ) |
Get the latest ADC conversion data.
| [in] | ADCx | Base address of ADC module |
| __STATIC_INLINE uint32_t ADC_GetFifoPopData | ( | ADC_T * | ADCx | ) |
get fifo pop data
| [in] | ADCx | Base address of ADC module |
| __STATIC_INLINE uint32_t ADC_GetLeftBiasData | ( | ADC_T * | ADCx | ) |
get adc data after bias & left shift
| [in] | ADCx | Base address of ADC module |
| __STATIC_INLINE uint32_t ADC_GetLeftShiftData | ( | ADC_T * | ADCx | ) |
get left shift data
| [in] | ADCx | Base address of ADC module |
| __STATIC_INLINE void ADC_IntMask | ( | ADC_T * | ADCx, |
| uint32_t | IntMask, | ||
| FunctionalState | NewState | ||
| ) |
Set interrupt mask,if masked,interrupt will not be happened.
| [in] | ADCx | Base address of ADC module |
| [in] | u32Mask | The combination of following interrupt mask bits. Each bit corresponds to a interrupt mask flag.
|
| [in] | NewState | new state of adc interrupt mask |
| __STATIC_INLINE bool ADC_IsBusy | ( | ADC_T * | ADCx | ) |
Get the busy state of ADC.
| [in] | ADCx | Base address of ADC module |
| 0 | ADC is not busy |
| 1 | ADC is busy |
| __STATIC_INLINE bool ADC_IsDataOverrun | ( | ADC_T * | ADCx | ) |
Check if the ADC conversion data is over written or not.
| [in] | ADCx | Base address of ADC module |
| 0 | ADC data is not overrun |
| 1 | ADC data is overrun |
| __STATIC_INLINE bool ADC_IsDataValid | ( | ADC_T * | ADCx | ) |
Check if the ADC conversion data is valid or not.
| [in] | ADCx | Base address of ADC module |
| 0 | ADC data is not valid |
| 1 | ADC data us valid |
| __STATIC_INLINE bool ADC_IsIntOccured | ( | ADC_T * | ADCx, |
| uint32_t | IntMask | ||
| ) |
adjust the user-specified interrupt occured or not
| [in] | ADCx | Base address of ADC module |
| [in] | IntMask | The combination of following interrupt status bits. Each bit corresponds to a interrupt status. |
| __STATIC_INLINE bool ADC_IsOneChConvertEnd | ( | ADC_T * | ADCx | ) |
adjust pwm sequence convert end or not in adc one channel
| [in] | ADCx | Base address of ADC module |
| __STATIC_INLINE void ADC_LeftShiftEn | ( | ADC_T * | ADCx, |
| FunctionalState | NewState | ||
| ) |
enable left shift function,if enable,adc data {adc_output[11:0],4'b0 }
| [in] | ADCx | Base address of ADC module |
| [in] | NewState | new state of left shift function |
| __STATIC_INLINE void ADC_Open | ( | ADC_T * | ADCx, |
| uint32_t | ChMask | ||
| ) |
This API configures ADC module to be ready for convert the input from selected channel.
| [in] | ADCx | Base address of ADC module |
| [in] | ChMask | Channel enable bit. Each bit corresponds to a input channel. Bit 0 is channel 0, bit 1 is channel 1... |
| __STATIC_INLINE void ADC_PowerDown | ( | ADC_T * | ADCx | ) |
Power down ADC module.
| [in] | ADCx | Base address of ADC module |
| __STATIC_INLINE void ADC_PowerOn | ( | ADC_T * | ADCx | ) |
Power on ADC module.
| [in] | ADCx | Base address of ADC module |
| __STATIC_INLINE void ADC_SelInputRange | ( | ADC_T * | ADCx, |
| uint32_t | EnableHigh | ||
| ) |
Select ADC range of input sample signal.
| [in] | ADCx | Base address of ADC module |
| [in] | EnableHigh | If EnableHigh is 1,adc input range is 0V~VDD;if u32EnableHigh is 0,adc input range is 0V~1.2V. 0V~VDD & 0V~1.2V both is theoretical value,the real range is determined by bandgap voltage. |
| __STATIC_INLINE void ADC_SeqModeChSelect | ( | ADC_T * | ADCx, |
| uint8_t | Ch | ||
| ) |
adc channel select in pwm sequential
| [in] | ADCx | Base address of ADC module |
| [in] | Ch | adc channel select |
| void ADC_SeqModeEnable | ( | ADC_T * | ADCx, |
| uint32_t | SeqTYPE, | ||
| uint32_t | ModeSel | ||
| ) |
ADC PWM Sequential Mode Control.
| [in] | ADCx | Base address of ADC module |
| [in] | SeqTYPE | This parameter decides which type will be selected. |
| [in] | ModeSel | This parameter decides which mode will be selected. |
| __STATIC_INLINE void ADC_SeqModeOneChEn | ( | ADC_T * | ADCx, |
| FunctionalState | NewState | ||
| ) |
pwm sequential enable in adc one channel mode
| [in] | ADCx | Base address of ADC module |
| [in] | NewState | new state of adc sequence mode |
| void ADC_SeqModeTriggerSrc | ( | ADC_T * | ADCx, |
| uint32_t | SeqModeTriSrc | ||
| ) |
ADC PWM Sequential Mode PWM Trigger Source and type.
| [in] | ADCx | Base address of ADC module |
| [in] | SeqModeTriSrc | This parameter decides first PWM trigger source and type. |
| void ADC_SeqOneChModeConfig | ( | ADC_T * | ADCx, |
| uint32_t | Trig, | ||
| uint8_t | Level, | ||
| uint8_t | DmaEn, | ||
| uint8_t | HwClrEN, | ||
| uint8_t | AdcCh | ||
| ) |
set ADC PWM one channel Sequential Mode configuration.
| [in] | ADCx | Base address of ADC module |
| [in] | Trig | This parameter decides first PWM trigger source and type. |
| [in] | Level | This parameter decides fifo threshold value. |
| [in] | DmaEn | This parameter decides dma is used or not. |
| [in] | HwClrEN | This parameter decides PWM trigger flag cleared by hardware or software. |
| [in] | AdcCh | This parameter decides which adc channel selected. |
| __STATIC_INLINE void ADC_SequentialModeDisable | ( | ADC_T * | ADCx | ) |
ADC sequential mode Disabled.
| [in] | ADCx | Base address of ADC module |
| __STATIC_INLINE void ADC_SetBiasData | ( | ADC_T * | ADCx, |
| uint32_t | BiasData | ||
| ) |
set bias data
| [in] | ADCx | Base address of ADC module |
| [in] | BiasData | data value |
| __STATIC_INLINE void ADC_SetClockDivider | ( | ADC_T * | ADCx, |
| uint32_t | Divider | ||
| ) |
Set the A/D clock division.
| [in] | ADCx | Base address of ADC module |
| [in] | Divider | Adc clk divider |
| __STATIC_INLINE void ADC_SetExtraSampleTime | ( | ADC_T * | ADCx, |
| uint32_t | SampleTime | ||
| ) |
Set ADC sample time for designated channel.
| [in] | ADCx | Base address of ADC module |
| [in] | SampleTime | ADC sample ADC time, valid values are |
| __STATIC_INLINE void ADC_SetFifoTrigLevel | ( | ADC_T * | ADCx, |
| uint8_t | Level | ||
| ) |
set adc fifo trig level
| [in] | ADCx | Base address of ADC module |
| [in] | Level | dma request level ADC_FIFO_TRIG_LEVEL_HALF ADC_FIFO_TRIG_LEVEL_FULL |
| __STATIC_INLINE void ADC_StartConvert | ( | ADC_T * | ADCx | ) |
Start the A/D conversion.
| [in] | ADCx | Base address of ADC module |
| __STATIC_INLINE bool ADC_StatusFlag | ( | ADC_T * | ADCx, |
| uint32_t | IntMask | ||
| ) |
Get raw status flag.
| [in] | ADCx | Base address of ADC module |
| [in] | IntMask | The combination of following status bits. Each bit corresponds to a status flag.
|
| __STATIC_INLINE void ADC_StopConvert | ( | ADC_T * | ADCx | ) |
Stop the A/D conversion.
| [in] | ADCx | Base address of ADC module |
| __STATIC_INLINE void ADC_SubtractBiasEn | ( | ADC_T * | ADCx, |
| FunctionalState | NewState | ||
| ) |
enable subtract bias function
| [in] | ADCx | Base address of ADC module |
| [in] | NewState | new state of subtract bias function |
| __STATIC_INLINE void ADC_TestModeDisable | ( | ADC_T * | ADCx | ) |
Disable the A/D test mode.
| [in] | ADCx | Base address of ADC module |
| __STATIC_INLINE void ADC_TestModeEnable | ( | ADC_T * | ADCx | ) |
Enable the A/D test mode.
| [in] | ADCx | Base address of ADC module |
| __STATIC_INLINE void ADC_Trigger2Select | ( | ADC_T * | ADCx, |
| FunctionalState | NewState | ||
| ) |
TRG1CTL select for 1-shunt sequential mode.
| [in] | ADCx | Base address of ADC module |
| [in] | NewState | new state of adc sequence mode |
| __STATIC_INLINE void ADC_TriggerDelay | ( | ADC_T * | ADCx, |
| uint32_t | Data | ||
| ) |
Delay ADC start conversion time after PWM trigger.
| [in] | ADCx | Base address of ADC module |
| [in] | Data | for Delay time |