pan_i2c.h

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/*
 * Copyright (C) 2021 Panchip Technology Corp. All rights reserved.
 *
 * SPDX-License-Identifier: Apache-2.0 
 */
 
#ifndef __PAN_I2C_H__
#define __PAN_I2C_H__
 
#ifdef __cplusplus
extern "C"
{
#endif
 
 
typedef struct
{
  uint32_t I2C_ClockSpeed;
  uint16_t I2C_Mode;                
  uint16_t I2C_DutyCycle;           
  uint16_t I2C_OwnAddress1;         
  uint16_t I2C_AcknowledgedAddress;
}I2C_InitTypeDef;
 
 
 
 
#define PAN_I2C_MODE_MASTER                         ((uint16_t)0x0021)  
#define PAN_I2C_MODE_SLAVE                          ((uint16_t)0x0000)  
#define IS_I2C_MODE(MODE)                       (((MODE) == PAN_I2C_MODE_MASTER) || \
                                                 ((MODE) == PAN_I2C_MODE_SLAVE))    
#define I2C_SPEED_STANDARD_MODE                 (uint16_t)(0x0002)  
#define I2C_SPEED_FAST_MODE                     (uint16_t)(0x0004)  
#define I2C_SPEED_HIGH_MODE                     (uint16_t)(0x0006)  
#define I2C_DutyCycle_16_9                      ((uint16_t)0x4000) 
#define I2C_DutyCycle_2                         ((uint16_t)0xBFFF) 
#define IS_I2C_DUTY_CYCLE(CYCLE)                (((CYCLE) == I2C_DutyCycle_16_9) || \
                                                 ((CYCLE) == I2C_DutyCycle_2))  
#define I2C_AcknowledgedAddress_7bit            ((uint16_t)0x4000)  
#define I2C_AcknowledgedAddress_10bit           ((uint16_t)0xC000)  
#define I2C_CMD_WR                              ((uint8_t)0x00) 
#define I2C_CMD_RD                              ((uint8_t)0x01) 
#define I2C_CMD_STOP                            ((uint8_t)0x02) 
#define I2C_CMD_RESTART                         ((uint8_t)0x04) 
#define I2C_RX_TL_0                             ((uint8_t)0x00) 
#define I2C_RX_TL_1                             ((uint8_t)0x01) 
#define I2C_RX_TL_2                             ((uint8_t)0x02) 
#define I2C_RX_TL_3                             ((uint8_t)0x03) 
#define I2C_RX_TL_4                             ((uint8_t)0x04) 
#define I2C_RX_TL_5                             ((uint8_t)0x05) 
#define I2C_RX_TL_6                             ((uint8_t)0x06) 
#define I2C_RX_TL_7                             ((uint8_t)0x07) 
#define I2C_RX_TL_8                             ((uint8_t)0x08) 
#define I2C_TX_TL_0                             ((uint8_t)0x00) 
#define I2C_TX_TL_1                             ((uint8_t)0x01) 
#define I2C_TX_TL_2                             ((uint8_t)0x02) 
#define I2C_TX_TL_3                             ((uint8_t)0x03) 
#define I2C_TX_TL_4                             ((uint8_t)0x04) 
#define I2C_TX_TL_5                             ((uint8_t)0x05) 
#define I2C_TX_TL_6                             ((uint8_t)0x06) 
#define I2C_TX_TL_7                             ((uint8_t)0x07) 
#define I2C_TX_TL_8                             ((uint8_t)0x08) 
#define I2C_IT_RX_UNDER                         ((uint16_t)0x0001)  
#define I2C_IT_RX_OVER                          ((uint16_t)0x0002)  
#define I2C_IT_RX_FULL                          ((uint16_t)0x0004)  
#define I2C_IT_TX_OVER                          ((uint16_t)0x0008)  
#define I2C_IT_TX_EMPTY                         ((uint16_t)0x0010)  
#define I2C_IT_RD_REQ                           ((uint16_t)0x0020)  
#define I2C_IT_TX_ABORT                         ((uint16_t)0x0040)  
#define I2C_IT_RX_DONE                          ((uint16_t)0x0080)  
#define I2C_IT_ACTIVITY                         ((uint16_t)0x0100)  
#define I2C_IT_STOP_DET                         ((uint16_t)0x0200)  
#define I2C_IT_START_DET                        ((uint16_t)0x0400)  
#define I2C_IT_GEN_CALL                         ((uint16_t)0x0800)  
#define I2C_IT_MST_ON_HOLD                      ((uint16_t)0x2000)  
#define I2C_IT_ALL                              ((uint16_t)0x2FFF)  
#define I2C_FLAG_SLV_ACTIVITY                   ((uint32_t)0x00000040)  
#define I2C_FLAG_MST_ACTIVITY                   ((uint32_t)0x00000020)  
#define I2C_FLAG_RFF                                    ((uint32_t)0x00000010)  
#define I2C_FLAG_RFNE                                   ((uint32_t)0x00000008)  
#define I2C_FLAG_TFE                                    ((uint32_t)0x00000004)  
#define I2C_FLAG_TFNF                                   ((uint32_t)0x00000002)  
#define I2C_FLAG_ACTIVITY                       ((uint32_t)0x00000001)  
#define FLAG_MASK                               ((uint32_t)0x007F0FFF)  
#define ITEN_MASK                               ((uint16_t)0x2FFF)          
#define IT_FLAG_MASK                            ((uint16_t)0x2FFF)          
__STATIC_INLINE void I2C_SetMode(I2C_T* I2Cx, uint16_t Mode)
{
    (Mode == PAN_I2C_MODE_MASTER)?(I2Cx->CON |= (I2C_CON_IC_SLAVE_DISABLE | I2C_CON_MASTER_MODE)):(I2Cx->CON &= ~(I2C_CON_IC_SLAVE_DISABLE | I2C_CON_MASTER_MODE));
}
__STATIC_INLINE void I2C_SetTxTirggerLevel(I2C_T* I2Cx, uint8_t ThresholdValue)
{
    I2Cx->TX_TL = (I2Cx->TX_TL & ~I2C_TX_TL) | (ThresholdValue & 0xF);
}
 
__STATIC_INLINE void I2C_SetRxTirggerLevel(I2C_T* I2Cx, uint8_t ThresholdValue)
{
    I2Cx->RX_TL = (I2Cx->RX_TL & ~I2C_RX_TL) | (ThresholdValue & 0xF);
}
__STATIC_INLINE void I2C_Cmd(I2C_T* I2Cx, FunctionalState NewState)
{
    (NewState != DISABLE)?(I2Cx->IC_ENABLE |= I2C_ENABLE_ENABLE):(I2Cx->IC_ENABLE &= (uint32_t)~((uint32_t)I2C_ENABLE_ENABLE));
}
__STATIC_INLINE void I2C_GeneralCallCmd(I2C_T* I2Cx, FunctionalState NewState)
{
    (NewState != DISABLE)?(I2Cx->TAR = (I2Cx->TAR | I2C_TAR_SPECIAL) & (~I2C_TAR_GC_OR_START)):(I2Cx->TAR = I2Cx->TAR);
}
 
__STATIC_INLINE void I2C_SendDataCmd(I2C_T* I2Cx, uint8_t Data, uint8_t Cmd)
{
    I2Cx->DATACMD = ((Cmd << 8 ) | (Data & 0xFF));
}
__STATIC_INLINE void I2C_SendCmd(I2C_T* I2Cx, uint8_t Cmd)
{
    I2Cx->DATACMD |= (Cmd << 8);
}
__STATIC_INLINE uint8_t I2C_ReceiveData(I2C_T* I2Cx)
{
    return (uint8_t)I2Cx->DATACMD;
}
__STATIC_INLINE void I2C_AbortTransfer(I2C_T* I2Cx)
{
    I2Cx->IC_ENABLE |= I2C_ENABLE_ABORT;
}
__STATIC_INLINE void I2C_DMACmd(I2C_T* I2Cx, FunctionalState NewState)
{
    (NewState != DISABLE)?(I2Cx->DMA_CR |= (I2C_DMA_CR_RDMAE | I2C_DMA_CR_TDMAE)):(I2Cx->DMA_CR &= (uint32_t)~((uint32_t)(I2C_DMA_CR_RDMAE | I2C_DMA_CR_TDMAE)));
}
__STATIC_INLINE void I2C_DMATransferDataLevel(I2C_T* I2Cx, uint8_t Level)
{
    I2Cx->DMA_TDLR |= (Level & 0x07);
}
__STATIC_INLINE void I2C_DMAReceiveDataLevel(I2C_T* I2Cx, uint8_t Level)
{
    I2Cx->DMA_RDLR |= (Level & 0x07);
}
__STATIC_INLINE ITStatus I2C_GetITStatus(I2C_T* I2Cx, uint16_t I2C_IT)
{
    return ((I2Cx->INTR_STAT & (I2C_IT & IT_FLAG_MASK)) != (uint32_t)RESET)?(SET):(RESET);
}
__STATIC_INLINE ITStatus I2C_GetRawITStatus(I2C_T* I2Cx, uint16_t I2C_IT)
{
    return ((I2Cx->RAW_INTR_STAT & (I2C_IT & IT_FLAG_MASK)) != (uint32_t)RESET)?(SET):(RESET);
}
__STATIC_INLINE void I2C_ITConfig(I2C_T* I2Cx, uint16_t I2C_IT, FunctionalState NewState)
{
    (NewState != DISABLE)?(I2Cx->INTR_MASK |= I2C_IT):(I2Cx->INTR_MASK &= (uint16_t)~I2C_IT);
}
 
__STATIC_INLINE void I2C_DisableAllIT(I2C_T* I2Cx)
{
    I2Cx->INTR_MASK = 0x0;
}
__STATIC_INLINE void I2C_ClearAllITPendingBit(I2C_T* I2Cx)
{
    (void)(I2Cx->CLR_INTR);
}
 
__STATIC_INLINE bool I2C_AbortSrcCheck(I2C_T* I2Cx,uint32_t IC_MSK)
{
    return (I2Cx->TX_ABRT_SRC & IC_MSK)?(true):(false);
}
 
 
__STATIC_INLINE void I2C_SetSlaveAddr(I2C_T* I2Cx,uint32_t addr)
{
    I2Cx->SAR = (I2Cx->SAR & ~I2C_TAR_TAR) | addr;
}
 
 
bool I2C_Init(I2C_T* I2Cx, I2C_InitTypeDef* I2C_InitStruct);
void I2C_Set7bitAddress(I2C_T* I2Cx, uint8_t Address);
void I2C_Set10bitAddress(I2C_T* I2Cx, uint16_t Address);
 
FlagStatus I2C_GetFlagStatus(I2C_T* I2Cx, uint32_t I2C_FLAG);
void I2C_ClearITPendingBit(I2C_T* I2Cx, uint16_t I2C_IT);
 
void I2C_Write(I2C_T* I2Cx,uint8_t *WriteBuf,uint32_t Size);
 
void I2C_Read(I2C_T* I2Cx,uint8_t *ReadBuf,uint32_t Size);
 
#ifdef __cplusplus
}
#endif
 
#endif /* __PAN_I2C_H__ */