Modules

Here is a list of all modules:

[detail level 12]

Acc Interface	Acc Interface
►Adc Interface	Adc Interface
Adc interrupt	Adc interrupt control
Adc sample clock	Adc sample clock time
Adc sequential mode	Adc sequential mode control
►Clk Interface	Clk Interface
Clk frequence	Clk frequence definitions
System clk source select	System clk source definitions
Dpll clk reference source select	Dpll clk reference source select definitions
Apb2 clk divisor	Apb2 clk divisor definitions
Apb1 clk divisor	Apb1 clk divisor definitions
Apb1 clk enable	Apb1 clk enable definitions
Apb2 clk enable	Apb2 clk enable definitions
Ahb peripheral clk enable	Ahb peripheral clk enable definitions
Clk reference source	Clk reference source definitions
Clktrim Interface	Clktrim Interface
►Dma Interface	Dma Interface
Dma transfer type	Dma transfer type definition
Dma burst lenth	Dma burst lenth definition
Dma memory address state	Dma memory address state definition
Dma data width select	Dma data width select definition
Dma channel function	Dma channel function definition
Dma handshake polarity	Dma handshake polarity definition
Dma handshake control	Dma handshake control definition
Dma channel priority	Dma channel priority definition
Dma interrupt status	Dma interrupt status definition
Dma interrupt mask	Dma interrupt mask definition
►Efuse Interface	Efuse Interface
Efuse operate command	Efuse operate command definitions
Efuse status	Efuse status definitions
►Fmc Interface	Fmc Interface
Fmc erase command	Fmc erase command definition
Fmc status reg w/r command	Fmc status register write and read command definition
Fmc status reg operation command	Fmc status register operation command definition
Fmc read command	Fmc read command definition
Fmc burst read command	Fmc burst read command definition
Fmc work type select	Fmc work type select definition
►Gpio Interface	Gpio Interface
Gpio mode	Gpio mode definitions
Gpio interrupt type	Gpio interrupt type definitions
Gpio debounce src	Gpio debouce src definitions
Gpio debounce count	Gpio debouce count definitions
Gpio address map
►I2c Interface	I2c Interface
I2c rx threshold level	I2c receive fifo threshold level
I2c tx transmit level	I2c transmit fifo threshold level
I2c interrupts	I2c raw interrupts flag
I2c state	I2c device and fifo state flag
►I2s Interface	I2s Interface
I2s word select	I2s word select cycles in the left or right sample mode
I2s clk gating	I2s clk gating definition
I2s data resolution select	I2s data resolution select definition
I2s interrupt flag	I2s interrupt flag definition
►Kscan Interface	Kscan Interface
Kscan enable bit	Kscan enable bit definitions
Kscan interval clk cycle	Kscan interval clk cycle definitions
►Lowpower Interface	Lowpower Interface
Lowpower gpio wake up edge	Lowpower gpio wake up edge select definitions
Lowpower wakeup source select	Lowpower wakeup source select definitions
►Phy Interface	Phy Interface
Phy type select	Phy type select definitions
Phy action select	Phy action select definitions
►Private rf Interface	Private rf Interface
Private rf mode type	Private rf mode type definitions
Private rf address lenth type	Private rf address lenth type definitions
Private rf chip mode type	Private rf chip mode type definitions
Private rf buf memory address offset	Private rf buf memory address offset definitions
►Pwm Interface	Pwm Interface
Pwm channel number	Pwm channel number constants definitions
Pwm clk divider	Pwm clk divider constants definitions
Pwm aligned type	Pwm aligned type constants definitions
Pwm period interrupt condition	Pwm period interrupt trigger condition constants definitions
Pwm operate type	Pwm operate type constants definitions
Pwm count mode	Pwm count mode constants definitions
►Qdec Interface	Qdec Interface
Qdec polarity type	Qdec polarity type definitions
Qdec polarity type	Qdec channel counter definitions
Kscan enable bit	Kscan enable bit definitions
►Spi Interface	Spi Interface
Spi interrupt event type	Spi interrupt event type constants definitions
Spi operating mode	Spi operating mode constants definitions
Spi data frame size	Spi data frame size constants definitions
Spi baudrate divider	Spi baudrate divider constants definitions
Spi clock polarity	Spi clock polarity constants definitions,Serial Clock Polarity, Used to select the polarity of the inactive serial clock, which is held inactive when the DW_apb_ssi master is not actively transferring data on the serial bus
Spi clock phase	Spi clock phase constants definitions
Spi frame format	Spi frame format constants definitions
►System Interface	System Interface
Module reset control resister	Module reset control resister constant definitions
Brown out detector threshold voltage selection	Rown out detector threshold voltage selection constant definitions
Io function define	Io function define constant definitions
Bod and lvr glitch time control	Bod and lvr glitch time control constant definitions
►Timer Interface	Timer Interface
Timer work mode	Timer work mode definition
Timer counting mode	Timer counting mode definition
Timer capture mode	Timer capture edge definition
Timer counting edge	Timer counting edge definition
Timer capture souce	Timer capture source definition
►Uart Interface	Uart Interface
Uart transmit fifo threshold	Uart transmit fifo threshold definition
Uart receive fifo threshold	Uart receive fifo threshold definition
Uart line control	This is the data type used for manipulation of the UART line control settings
Uart interrupts status	These are the bit definitions used for managing UART interrupts. The functionality of ETBEI and ERBFI alters when programmable THRE interrupt mode is active (dw_uart_enablePtime()). See the DW_apb_uart databook for a detailed description
Uart event mode	This is the data type used for specifying UART events. An event is the occurrence of an interrupt which must be handled appropriately. One of these events is passed at a time to the user listener function to be processed. The exception to this are the UART_EVENT_THR_EMPTY and UART_EVENT_TIMEOUT interrupts which are handled internally by the interrupt handler
Uart line status	These are the definitions used for reporting the line status including errors, if any. Note that they represent bits of an 8-bit register and more than one can be active at any time
Uart modem status	Uart modem status definitions
►Wdt Interface	Wdt Interface
Wdt timeout count	Wdt timeout count definition
Wdt reset delay time	Wdt reset delay time definition
►Wwdt Interface	Wwdt Interface
Wdt prescare	Wdt prescare definition